1. Field of the Invention
The present invention relates to a method for forming a semiconductor structure, and in particular relates to a method for forming a JFET.
2. Description of the Related Art
Junction field effect transistors (JFET) have been mostly used for analog switches and signal amplifiers; especially, low noise amplifiers.
For a field effect transistor, an electric field near a carrier channel is mostly changed by controlling a signal (or bias of a gate), resulting in the change of the channel property and current property (between a source and a drain). Thus, the field effect transistor can be used for voltage controlled variable resistance, voltage controlled current source (VCCS), etc. The channel width of the junction field effect transistor is changed by changing the width of the depletion region in the PN junction between the gate and the source/drain using the principle, whereby the function of the width of the deletion and the voltage is reversed.
In the junction field effect transistor, when voltage is applied to the gate and causes depletion region of the PN junction, the channel width is reduced. Moreover, when the gate voltage is larger than a threshold value, referred to as pinch-off voltage, and the channel disappears due to over-width of the depletion region, referred to as being pinched off, a huge electric resistance results. The present invention relates to a manufacturing method for adjusting the pinch-off voltage.